TASS: Timing Analyzer of Scenario-Based Specifications | ||||
|
|
ATM ExampleThe first example is the automatic teller machine (ATM) system is [1] whose specification is depicted in Figure 1. We will introduce the SBS first then we'll show the experiment data.
Scenario-based specification for the ATM exampleThe ATM system consists of the three components: potential customers (process User), the ATM controller (process ATM), and a host computer in a bank (process Bank). Initially, the ATM controller waits to receive the customer’s bank card and requests a pin number in [0, 2] seconds after receiving a card (0≤b1-a2≤2, SDs StartTrans and GetPin). Then, it either receives a request to cancel the transaction within [0, 4] seconds (0≤c2-b1≤4, SD EndTrans), or receives the customer's pin number within [5, 60] seconds (5≤d2-b1≤60, SD ProcessPin). If the ATM receives a request to cancel the transaction, it returns the customer’s card and takes [2, 3] seconds to return to its initial state (2≤ωc-c3≤3, SD EndTrans). The ATM expects a reply from the bank within 10 seconds, which is represented by the following timing constraints:
Each ATM-customer communication takes at least T1 seconds, and each ATM-bank communication takes at least T2 seconds, which we do not explicitly represent in the chart.
Figure 1 Scenario-based specification for the ATM example For timing analysis of the ATM specification depicted in Figure 1, TASS is used to solve the following problems:
Experiment DataWe created four cases with various values for W, B1, B2, T1, and T2. Then we analyzed the ATM SBS with both synchronous and asynchronous composition semantics. All the experiments were conducted on a Pentium 4 /2.2GHz/2.0GB PC. First we run all three timing analyzers with synchronous composition semantics. In the loop-unlimited timing analysis mode we first checked if the SBS is loop-unlimited. If so, we run the loop-unlimited timing analyzer to check the SBS. The results in table 1 shows that TASS runs comfortably for checking SBSs with 16 SDs in a few seconds.
*:the verification problem disappears because the node is unreachable. Table 1: Sample results of loop-unlimited timing analysis of the ATM specification with synchronous composition semantics
In path-oriented analysis mode, we checked the path “StartTrans → GetPin → ProcessPin → GetOption → (Withdraw → RefuseWith)k → Withdraw →DispenseCash → EndTrans”, which indicates a scenario that after k times of refusing withdraw the ATM can still conduct a correct dispense cash operation. It was shown that while the length of this path can be as long as 800 (400*2) steps with the amount of constraints reaching to 13696 and the amount of variables reaching to 6445 TASS could finish the computation within one and a half hours. The results in Table 2 was conducted on case 3.
Table 2. Sample results of path-oriented timing analysis of the ATM specification with synchronous composition semantics
In the bounded timing analysis we checked the paths of SBS one by one until the length of the path reaches to a given threshold. We set k to 20 so that the number of paths checked accumulates to 36704. Moreover we observed that during the computation TASS consumed no more than 30MB of memory. This advantage comes from our DFS manner in traversing the specifications. Since TASS can do the analysis without manual interference, given enough time it is possible to check a large amount of paths. The results data are shown in Table 3 which was conducted on case 4.
Table 3. Sample results of bounded timing analysis of the ATM specification with synchronous composition semantics
For asynchronous composition semantics we also conducted two experiments. In the path-orientd timing analysis mode we checked the path “StartTrans → GetPin → ProcessPin → GetOption → (Withdraw → RefuseWith)k → Withdraw →DispenseCash → EndTrans”. The results shown in Table 4 were conducted on case 3.
Table 4. Sample results of path-oriented timing analysis of the ATM specification with asynchronous composition semantics
At last we applied the bounded timing analysis to the ATM specification case 4. The results is shown below.
Table 5. Sample results of bounded timing analysis of the ATM specification with asynchronous composition semantics
[1] Hanene Ben-Abdallah and Stefan Leue. Timing Constraints in Message Sequence Chart Specifications. In Proceedings of FORTE/PSTV’97, Chapman & Hall, 1997. |
©2011 SEG CS NJU | Introduction Download Case Study 1 Case Study 2 |