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Artist2 / UNU-IIST School in China - 2007
| August 1-10, 2007 Suzhou (near Shanghai), China | organised and funded by Artist |
Programme
Wednesday, August 1 | ||
| 15:00-17:00 | Welcome Session | |
Thursday, August 2 | ||
| 09:00-12:00 | Luca Benini University of Bologna | SoC platforms: modeling and analysis SoC technology Silicon technology trends and challenges Application drivers Architecture evolution |
| 14:00-17:00 | Luca Benini University of Bologna | MPSoCs - Multi-core HW platforms Why MPSoCs: technology challenges application challenges MSoC architectures Case studies |
Friday, August 3 | ||
| 09:00-12:00 | Luca Benini University of Bologna | MPSoCs - Software platforms the software challenges System software - middleware Case studies: Industrial standardization intiatives |
| 14:00-17:00 | Luca Benini University of Bologna | Design technology for MPSoCs Analysis of non functional properties (eg. power, reliability) Mixed simulation / formal approaches |
Saturday, August 4 | ||
| 09:00-12:00 | Karl-Erik Arzen Lund University | Introduction to Feedback Control The role of feedback. Models and linearization. Stability. State-space and input-output models. Pole-placement. State-feedback and observers. Feedforward. |
| Computer Implementation of Control Systems Discretization of continuous-time control designs. Discrete-time control design. Aliasing. Anti-windup. Mode-handling. Numerics. PID control example. Task models for control. | ||
| 14:00-17:00 | Karl-Erik Arzen Lund University | Interaction between Control and Scheduling Interaction between control design and computer implementation. Temporal robustness. The effects of latencies and jitter on control performance. The Jitter Margin. The Control Server Model. Networked Embedded Control. |
Monday, August 6 | ||
| 09:00-12:00 | Karl-Erik Arzen Lund University | Co-Design Tools TrueTime – co-simulation of real-time kernels, networks, and continuous plants. Jitterbug – analytical temporal robustness evaluation of control loops. Several examples and demos will be shown. |
| 14:00-17:00 | Karl-Erik Arzen Lund University | Control of Computer Systems Examples of feedback in computer and communication systems. Queue-length control. Control of web-servers. Feedback scheduling in control systems. Feedback-based resource management. Control in Communication Networks. |
Tuesday, August 7 | ||
| 09:00-12:00 | Paul Caspi VERIMAG | Model-based development in control and in computer engineering Why? and how? A historical comparison The Lustre language A formally sound high level language for discrete-time control: semantics, static checks, code generation, translation from discrete-time Simulink. |
| 14:00-17:00 | Paul Caspi VERIMAG | Automata and hybrid systems Their joint modelling using Simulink-Stateflow. Modularity and mode automata in Simulink-Sateflow. Semantics Issues of Stateflow How to detect them How to avoid them How to safely generate code out of Stateflow by translation to Lustre. |
Wednesday, August 8 | ||
| 09:00-12:00 | Paul Caspi VERIMAG | Sampling and Implementing Mixed Continuous and Discrete-event Systems How to measure sampling and implementation errors how to bound them? Preemptive Scheduling and Multi-threading When are these mandatory? how to to design implementations that preserve the semantics of Simulink-Stateflow models? how to optimise them? |
| 14:00-17:00 | Kim Larsen Aalborg University | Modelling and Specification of Real-time Systems Timed Automata, Networks of Timed Automata, Timed CTL. Modelling in UPPAAL allowing discrete data-types and user-defined C-functions. Simulation and verification in UPPAAL. Modelling Patterns. Verification Techniques Basic decidability results. The Region construction. Efficient symbolic reachability analysis using zones. Efficient symbolic analysis of liveness and bounded liveness properties. UPPAAL verification options. Abstraction and compositionality. |
Thursday, August 9 | ||
| 09:00-12:00 | Kim Larsen Aalborg University | Performance Evaluation and Optimal Scheduling Scheduling and planning problem as reachability problems for timed automata. Symbolic A* algorithm. Branch-and-bound techniques. Priced Timed Automata and cost-optimal scheduling problems, including optimal finite schedules and optimal infinite schedules. Applications to jobshop scheduling, task-graph scheduling and other scheduling problems using UPPAAL Cora. |
| 14:00-17:00 | Kim Larsen Aalborg University | Testing Real-time Systems Timed automata-based conformance testing for real-time systems. Relativized conformance with respect assumption of application context. Techniques for off-line test case generation. State-set estimation and on-line testing. Application of UPPAAL-Tron. |
Friday, August 10 | ||
| 09:00-12:00 | Kim Larsen Aalborg University | Controller Synthesis Timed Game Automata. Winning strategies for reachability and safety games. Region-based decidability results. Backwards computation of winning strategies. Efficient forward, on-the-fly computation of winning strategies. From winning strategies to executable control programs. Application of UPPAAL Tiga. Optimal Timed Game Automata and cost-optimal winning strategies. Overview description These lectures will give provide a thorough tutorial on the tool UPPAAL and the newly emerged branches UPPAAL Cora, UPPAAL Tron and UPPAAL Tiga (see www.uppaal.com) and their application to the modelling, simulation, verification, scheduling, testing and controller synthesis for real time and embedded systems. |
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